DocumentCode
901576
Title
Design procedures for differential cascode voltage switch circuits
Author
Chu, Kan M. ; Pulfrey, David I.
Volume
21
Issue
6
fYear
1986
fDate
12/1/1986 12:00:00 AM
Firstpage
1082
Lastpage
1087
Abstract
Differential cascode voltage switch (DCVS) logic is a CMOS circuit technique which has potential advantages over conventional NAND/NOR logic in terms of circuit delay, layout density, power dissipation, and logic flexibility. Two procedures are presented for constructing DCVS trees to perform random logic functions. The first procedure uses a Karnaugh mapping technique and is a very powerful pictorial method for hand-processing designs involving up to six variables. The second procedure is a tabular method based on the Quine-McCluskey approach and is suitable for functions with more than six variables. Both of these procedures are considerably easier to implement than a recently proposed algebraic technique which relies upon decomposition and factorization of Boolean expressions. Several DCVS circuits that have been synthesized by the Karnaugh map (K-map) and tabular procedures are presented.
Keywords
CMOS integrated circuits; Integrated logic circuits; Logic design; integrated logic circuits; logic design; CMOS logic circuits; CMOS technology; Delay; Design methodology; Flexible printed circuits; Logic functions; Power dissipation; Switches; Switching circuits; Voltage;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1986.1052651
Filename
1052651
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