DocumentCode
901625
Title
Wide dynamic range four-quadrant CMOS analog multiplier using linearized transconductance stages
Author
Wong, S.L. ; Kalyanasundaram, N. ; Salama, C.A.T.
Volume
21
Issue
6
fYear
1986
fDate
12/1/1986 12:00:00 AM
Firstpage
1120
Lastpage
1122
Abstract
A novel four-quadrant CMOS analog multiplier has been designed and integrated using linearized differential stages as basic building blocks. The multiplier offers high input resistance and linear input ranges of ±2.5 V for a supply voltage of ±5 V. A 3-dB bandwidth of at least 1.6 MHz is attainable for either input.
Keywords
CMOS integrated circuits; Multiplying circuits; multiplying circuits; Bandwidth; Capacitance; Design optimization; Differential equations; Dynamic range; Electrical resistance measurement; Monolithic integrated circuits; Resistors; Transconductance; Voltage;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1986.1052656
Filename
1052656
Link To Document