Title :
A 1-GHz 6-bit ADC system
Author :
Poulton, Ken ; Corcoran, John J. ; Hornak, Thomas
fDate :
12/1/1987 12:00:00 AM
Abstract :
A two-rank GaAs sample-and-hold (S/H) chip and four 250-MHz silicon digitizers form a 1-GHz 6-b analog-to-digital converter (ADC) system. The two rank S/H architecture avoids dynamic errors inherent to interleaved ADCs; accuracy exceeds 5.2 effective bits, up to 1-GHz input frequency. Special attention is paid to avoiding GaAs slow transient errors.
Keywords :
Analogue-digital conversion; Sample and hold circuits; analogue-digital conversion; sample and hold circuits; Bandwidth; Gallium arsenide; Helium; High speed integrated circuits; MESFETs; Oscilloscopes; Sampling methods; Schottky diodes; Silicon; Timing;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.1987.1052844
