DocumentCode
904063
Title
Realization of a DPCM coder for 13.5-MHz sampling rate in CMOS technology
Author
Rothermel, A.
Volume
22
Issue
6
fYear
1987
fDate
12/1/1987 12:00:00 AM
Firstpage
1196
Lastpage
1197
Abstract
A DPCM (differential pulse-code modulation) coder integrated in a 2-μm CMOS technology is discussed. The motivation was to introduce low-cost coders for video signals compatible with the planned European ISDN. Due to the internal feedback loop, the main problem was to achieve the required operating speed of 13.5 MHz sampling rate. Measurements of fabricated samples proved that the expected performance was achieved.
Keywords
CMOS integrated circuits; Digital communication systems; Digital integrated circuits; Encoding; Pulse-code modulation; Video signals; digital communication systems; digital integrated circuits; encoding; pulse-code modulation; video signals; Adders; CMOS technology; Circuit testing; Feedback loop; Frequency; ISDN; Phase change materials; Programmable logic arrays; Sampling methods; Signal resolution;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1987.1052873
Filename
1052873
Link To Document