DocumentCode
904320
Title
MNOS memory transistors in simple memory arrays
Author
Carlstedt, L. Gunnar ; Svensson, Christer M.
Volume
7
Issue
5
fYear
1972
fDate
10/1/1972 12:00:00 AM
Firstpage
382
Lastpage
388
Abstract
The basic properties of MNOS memory transistors as digital memory elements are reviewed. Optimization procedures for obtaining maximum memory retention are presented and possible arrangements of memory transistors in simple arrays and writing and reading procedures for such arrays are discussed.
Keywords
Metal-insulator-semiconductor devices; Optimisation; Semiconductor storage devices; metal-insulator-semiconductor devices; optimisation; semiconductor storage devices; Charge carrier processes; Charge carriers; MOSFETs; PROM; Random access memory; Read-write memory; Silicon; Thickness control; Threshold voltage; Writing;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.1972.1052897
Filename
1052897
Link To Document