Analogue adaptive neural network circuit

Author

Chiang, M.L. ; Lu, T.C. ; Kuo, J.B.

Author_Institution

Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan

Volume

138

Issue

6

fYear

1991

fDate

12/1/1991 12:00:00 AM

Firstpage

717

Lastpage

723

Abstract

Current integrated circuits realising neural networks take up too much area for implementing synapses. The authors present a one-transistor (1T) synapse circuit that uses a single MOS transistor, which is more efficient for VLSI implementation of adaptive neural networks, compared to other synapse circuits. This 1T synapse circuit can be used to implement multiply/divide/sum circuits to realise an adaptive neural network. The feasibility of using this circuit in adaptive neural networks is demonstrated by a 4-bit analogue-to-digital converter circuit, based on the Hopfield modified neural network model, with an analogue LMS adaptive feedback. DC and transient studies show that 1T synapse circuits with an analogue adaptive feedback circuit can be used more efficiently for VLSI implementation of adaptive neural networks

Keywords

CMOS integrated circuits; VLSI; adaptive systems; analogue computer circuits; feedback; linear integrated circuits; neural nets; CMOS circuit; VLSI implementation; adaptive neural network circuit; analogue LMS adaptive feedback; multiply/divide/sum circuits; single MOS transistor; synapse circuit;

fLanguage

English

Journal_Title

Circuits, Devices and Systems, IEE Proceedings G

Publisher

iet

ISSN

0956-3768

Type

jour

Filename

105366