DocumentCode
907513
Title
Data-adaptive motion estimation algorithm and VLSI architecture design for low-power video systems
Author
Saponara, S. ; Fanucci, L.
Volume
151
Issue
1
fYear
2004
Firstpage
51
Lastpage
59
Abstract
A data-adaptive video motion estimation algorithm and its low-power VLSI implementation are presented. The proposed technique exploits the input data variations to dynamically reconfigure the search-window size of an exhaustive block-matching search thus avoiding unnecessary computations and memory accesses. Both spatial and temporal correlations of the motion vector field are taken into account. A quality analysis based on several test conditions confirms the efficiency of the motion estimator when compared with the conventional full-search as well as other low-complexity motion-estimation techniques. Realised in 0.25 μm CMOS technology, it allows for the same high performance of the full-search approach while considerably reducing power consumption from 70 up to 90% for typical QCIF and CIF video sequences.
Keywords
integrated circuit design; low-power electronics; motion estimation; video coding; CMOS technology; VLSI architecture design; data adaptive motion estimation algorithm; exhaustive block-matching search; input data variations; low power VLSI implementation; low power video systems; motion vector field;
fLanguage
English
Journal_Title
Computers and Digital Techniques, IEE Proceedings -
Publisher
iet
ISSN
1350-2387
Type
jour
DOI
10.1049/ip-cdt:20030858
Filename
1269636
Link To Document