DocumentCode
907771
Title
Parallel cellular floating-point multiplier
Author
Fr¿¿con, L.
Author_Institution
INSA, Département Informatique, Villeurbanne, France
Volume
6
Issue
8
fYear
1970
Firstpage
226
Lastpage
228
Abstract
A cell is defined as a modified full adder. Such a cell allows the design of a multiplier, which handles signed floating point numbers.
Keywords
adders; cellular arrays;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19700158
Filename
4234649
Link To Document