DocumentCode
909984
Title
SLAC Scanner Processor Applications in the Data Acquisition System for the Upgraded Mark II Detector
Author
Barklow, T. ; Glanzman, T. ; Lankford, A.J. ; Riles, K.
Author_Institution
Stanford Linear Accelerator Center, Stanford University, Stanford, California 94305
Volume
33
Issue
1
fYear
1986
Firstpage
775
Lastpage
778
Abstract
The SLAC Scanner Processor is a general purpose, programmable FASTBUS crate/cable master/slave module. This device plays a central role in the readout, buffering and preprocessing of data from the upgraded Mark II detector´s new central drift chamber. In addition to data readout, the SSPs assist in a variety of other services, such as detector calibration, FASTBUS system management, FASTBUS system initialization and verification, and FASTBUS module testing.
Keywords
Assembly; Calibration; Data acquisition; Detectors; Fastbus; Hardware; Linear accelerators; Master-slave; Registers; Testing;
fLanguage
English
Journal_Title
Nuclear Science, IEEE Transactions on
Publisher
ieee
ISSN
0018-9499
Type
jour
DOI
10.1109/TNS.1986.4337213
Filename
4337213
Link To Document