Title :
An input-free VT extractor circuit using a two-transistor differential amplifier
Author :
Johnson, Mark G.
Author_Institution :
Rambus Inc., Mountain View, CA, USA
fDate :
6/1/1993 12:00:00 AM
Abstract :
A three-terminal circuit (power, ground, and output) that provides a DC output voltage equal to the MOS threshold voltage VT is presented. The circuit uses the four-terminal extractor topology of Z. Wang (1992), but it adds self-biasing and a two-transistor differential amplifier to provide a ground-referenced output voltage
Keywords :
differential amplifiers; field effect transistor circuits; semiconductor device testing; test equipment; DC output voltage; MOS threshold voltage; device characterisation; four-terminal extractor topology; ground-referenced output voltage; self-biasing; three-terminal circuit; threshold voltage extractor circuit; two-transistor differential amplifier; Circuit topology; DRAM chips; Differential amplifiers; Fabrication; Linear regression; MOSFETs; Mirrors; Threshold voltage; Writing;
Journal_Title :
Solid-State Circuits, IEEE Journal of
