• DocumentCode
    910900
  • Title

    A new DLL-based approach for all-digital multiphase clock generation

  • Author

    Chung, Ching-Che ; Lee, Chen-Yi

  • Author_Institution
    Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
  • Volume
    39
  • Issue
    3
  • fYear
    2004
  • fDate
    3/1/2004 12:00:00 AM
  • Firstpage
    469
  • Lastpage
    475
  • Abstract
    A new DLL-based approach for all-digital multiphase clock generation is presented. By using the time-to-digital converter (TDC) with fixed-step search scheme, the proposed all-digital and cell-based solution can overcome the false-lock problem in conventional designs. Furthermore, the proposed all-digital multiphase clock generator (ADMCG) can easily be ported to different processes in a short time. Thus, it can reduce the design time and design complexity in many different applications. The test chip shows that our proposal demonstrates a wide frequency range to meet the needs of many digital communication applications.
  • Keywords
    delay lock loops; digital circuits; timing circuits; voltage-frequency convertors; DLL; all-digital multiphase clock generation; all-digital multiphase clock generator; design complexity; design time; digital communication; false-lock problem; fixed-step search; time-to-digital converter; Circuits; Clocks; Delay lines; Frequency; Jitter; Phase locked loops; Power supplies; Proposals; Sampling methods; Testing;
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/JSSC.2003.822890
  • Filename
    1269923