A directed search method for test generation using a concurrent simulator

Author

Agrawal, Vishwani D. ; Cheng, Kwang-Ting ; Agrawal, Pratima

Author_Institution

AT&T Bell Lab., Murray Hill, NJ, USA

Volume

8

Issue

2

fYear

1989

fDate

2/1/1989 12:00:00 AM

Firstpage

131

Lastpage

138

Abstract

A description is given of the application of a concurrent fault simulator to automatic test vector generation. As faults are simulated in the fault simulator a cost function is simultaneously computed. A simple cost function is the distance (in terms of the number of gates and flip-flops) of a fault effect from a primary output. The input vector is then modified to reduce the cost function until a test is found. Experimental results are presented showing the effectiveness of this method in generating tests for combinational and sequential circuits. By defining suitable cost functions, it has been possible to generate: (1) initialization sequences; (2) tests for a group of faults; and (3) a test for a given fault. Even asynchronous sequential circuits can be handled by this approach

Keywords

combinatorial circuits; flip-flops; logic testing; sequential circuits; asynchronous sequential circuits; automatic test vector generation; combinational circuits; concurrent simulator; cost function; directed search method; fault simulator; flip-flops; initialization sequences; input vector; primary output; sequential circuits; test generation; Automatic testing; Circuit faults; Circuit simulation; Circuit testing; Computational modeling; Cost function; Flip-flops; Search methods; Sequential analysis; Sequential circuits;

fLanguage

English

Journal_Title

Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on

Publisher

ieee

ISSN

0278-0070

Type

jour

DOI

10.1109/43.21831

Filename

21831