• DocumentCode
    911307
  • Title

    The Digital Correction Unit: A Data Correction/Compaction Chip

  • Author

    Mackenzie, S. ; Nielsen, B. ; Paffrath, L. ; Russell, J. ; Sherden, D.

  • Author_Institution
    Stanford Linear Accelerator Center, Stanford University, Stanford, California 94305
  • Volume
    34
  • Issue
    1
  • fYear
    1987
  • Firstpage
    250
  • Lastpage
    252
  • Abstract
    The Digital Correction Unit (DCU) is a semi-custom CMOS integrated circuit which corrects and compacts data for the SLD experiment. It performs a piece-wise linear correction to data, and implements two separate compaction algorithms. This paper describes the basic functionality of the DCU and its correction and compaction algorithms.
  • Keywords
    Analog memory; CMOS integrated circuits; Clocks; Compaction; Detectors; Event detection; Linear accelerators; Piecewise linear techniques; Superluminescent diodes; Timing;
  • fLanguage
    English
  • Journal_Title
    Nuclear Science, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9499
  • Type

    jour

  • DOI
    10.1109/TNS.1987.4337341
  • Filename
    4337341
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=911307