DocumentCode
913158
Title
A Hardware Architecture for Switch-Level Simulation
Author
Dally, William J. ; Bryant, Randal E.
Author_Institution
California Institute of Technology, Pasadena, CA, USA
Volume
4
Issue
3
fYear
1985
fDate
7/1/1985 12:00:00 AM
Firstpage
239
Lastpage
250
Abstract
The Mossim Simulation Engine (MSE) is a hardware accelerator for performing switch-level simulation of MOS VLSI circuits [1], [2]. Functional partitioning of the MOSSIM algorithm and specialized circuitry are used by the MSE to achieve a performance improvement of > 300 over a VAX 11/780 executing the MOSSIM II program. Several MSE processors can be connected in parallel to achieve additional speedup. A virtual processor mechanism allows the MSE to simulate large circuits with the size of the circuit limited only by the amount of backing store available to hold the circuit description.
Keywords
Central Processing Unit; Circuit simulation; Computational modeling; Computer simulation; Engines; Hardware; Logic; Switches; Testing; Very large scale integration;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/TCAD.1985.1270120
Filename
1270120
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