DocumentCode :
913965
Title :
Temperature-compensated analogue multiplier
Author :
Miller, A.K.H.
Author_Institution :
General Electric Co., Telecommunications Research Laboratories, Hirst Research Centre, Wembley, UK
Volume :
7
Issue :
18
fYear :
1971
Firstpage :
539
Lastpage :
540
Abstract :
The letter describes a 4-quadrant analogue multiplier which uses a field-effect transistor as a voltage-variable conductance in a differential-amplifier circuit configuration. Feedback is applied to the gate of the f.e.t. to linearise the IDS/VDS characteristic. A second matched f.e.t. is used to compensate for the changes in temperature, resulting in an accuracy of within 1% over a 50 deg. C temperature range.
Keywords :
analogue computer circuits; differential amplifiers; field effect transistors; 4 quadrant analogue multiplier; FET; analogue computer circuits; conductance network; high gain differential amplifier; voltage variable conductance;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el:19710365
Filename :
4235265
Link To Document :
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