• DocumentCode
    916183
  • Title

    A simple on-chip repetitive sampling setup for the quantification of substrate noise

  • Author

    De Wilde, Michiel ; Meeus, Wim ; Rombouts, Pieter ; Van Campenhout, Jan

  • Author_Institution
    Dept. of Electron. & Inf. Syst., Ghent Univ., Gent, Belgium
  • Volume
    41
  • Issue
    5
  • fYear
    2006
  • fDate
    5/1/2006 12:00:00 AM
  • Firstpage
    1062
  • Lastpage
    1072
  • Abstract
    The quantification of substrate noise is an important issue in mixed-signal designs, where sensitive analog circuits are embedded in a hostile digital environment. In this paper we present an experimental environment to characterize the sensitivity of embedded analog circuits to digitally generated substrate noise. Our measurement technique is based on equivalent-time substrate voltage sampling and uses a simple differential latch comparator without explicit input sample-and-hold. A surprisingly large measurement bandwidth is observed,which is explained from the detailed circuit behavior. On our 0.18-μm CMOS test chip,we have demonstrated that our system allows to wave trace pulses as narrow as 200 ps accurately. Additionally, the extraction of precise measurement data from observations that are excessively corrupted by additive noise and timing jitter is addressed. We present simple yet very effective methods to accurately reconstruct pulse waveform features without the use of delicate deconvolution operations.
  • Keywords
    CMOS integrated circuits; comparators (circuits); integrated circuit measurement; integrated circuit noise; integrated circuit testing; mixed analogue-digital integrated circuits; timing jitter; 0.18 micron; 200 ps; CMOS integrated circuits; CMOS test chip; additive noise; differential amplifiers; differential latch comparator; equivalent-time substrate voltage sampling; integrated circuit noise; mixed-signal designs; on-chip repetitive sampling; sensitive analog circuits; substrate noise quantification; timing jitter; Analog circuits; Character generation; Circuit noise; Latches; Measurement techniques; Noise generators; Sampling methods; Semiconductor device measurement; Voltage; Working environment noise; CMOS integrated circuits; differential amplifiers; integrated circuit noise; jitter;
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/JSSC.2006.872873
  • Filename
    1624395