Correlation-coefficient optimisation in integrated-circuit design

This paper reviews the accomplishments to date in the use of correlation coefficients between circuit elements as design variables in the computer-aided tolerance design of integrated circuits. Two optimisation schemes have been developed which make use of the interior-point and exterior-point penalty function methods. Each method requires a different set of constraint equations to provide a positive definite correlation-coefficient matrix. A comparison of the two approaches is given, using a practical circuit tolerance design example.