Title :
A 15 MHz 32-channel flash ADC FASTBUS board for use at LEP
Author :
Crawley, H.B. ; Gorbics, M.S. ; Holland, G.E. ; Homer, J.F., Jr. ; McKay, R. ; Meyer, W.T. ; Rosenberg, E.I. ; Thomas, W.D.
Author_Institution :
Dept. of Phys., Iowa State Univ., Ames, IA, USA
Abstract :
The design and performance of a single-width multilayer FASTBUS board for digitization of electromagnetic calorimeter data at LEP are described. The board consists of 32 channels of flash analog-to-digital converters (ADCs) clocked at 15 MHz. The digitized data are filtered through a zero-suppression circuit, stored in a buffer memory, and then reformatted using an onboard microprocessor. The microprocessor allows calibration tasks such as pedestal monitoring and linearity/relative gain measurements to be performed efficiently.<>
Keywords :
analogue-digital conversion; computer interfaces; physics computing; 15 MHz; 32 channels; design; digitization; electromagnetic calorimeter data; flash ADC; performance; single-width multilayer FASTBUS board; Analog-digital conversion; Buffer storage; Calibration; Circuits; Clocks; Fastbus; Linearity; Microprocessors; Monitoring; Nonhomogeneous media;
Journal_Title :
Nuclear Science, IEEE Transactions on
