A 64-GHz fT and 3.6-V BVCEO Si bipolar transistor using in situ phosphorus-doped and large-grained polysilicon emitter contacts

A high-performance bipolar transistor has been developed using an in-situ phosphorus doped polysilicon (IDP) technique for emitter formation. The transistor demonstrated in ultrahigh current gain of 700, a maximum cutoff frequency f_T(max) of 64 GHz, and a breakdown voltage between collector and emitter BV_CEO of 3.6 V. At V_CE values of 2 and 3 V, a product of f_T(max) and BV_CEO of 200 GHz-V has been achieved. This value is nearly equal to the physical limitation for homojunction silicon transistors