DocumentCode
925071
Title
PNoC: a flexible circuit-switched NoC for FPGA-based systems
Author
Hilton, C. ; Nelson, B.
Author_Institution
Rincon Res. Corp., Tucson, AZ, USA
Volume
153
Issue
3
fYear
2006
fDate
5/2/2006 12:00:00 AM
Firstpage
181
Lastpage
188
Abstract
Increases in chip density due to Moore´s law allow for the implementation of ever larger and more complex systems on a single chip (SoCs). The communication mechanisms employed in such SoCs are an important contribution to their overall performance. Networks on chip (NoCs) promise to overcome the scalability problems found in bus-based interconnect. To date, most work has focused on packet-switched NoCs. Circuit-switched networks are an intriguing alternative, which promise high communication rates and predictable communication latencies. A new lightweight circuit-switched architecture called programmable NoC (PNoC) is described. PNoC is a flexible architecture that is suitable for use in FPGA-based systems. Implementation results on a Virtex-II Pro device are given using an image binarisation demonstration which resulted in as much as a 23× speedup compared with a shared bus implementation.
Keywords
circuit switching; digital signal processing chips; field programmable gate arrays; image processing; network-on-chip; FPGA system; Moores law; SoC; bus interconnect; chip density; circuit switched architecture; communication latency rate; communication mechanism; complex system; field programmable gate array; flexible circuit switch architecture; image binarisation; network on chip; packet switch; programmable NoC; scalability problem; system on chip;
fLanguage
English
Journal_Title
Computers and Digital Techniques, IEE Proceedings -
Publisher
iet
ISSN
1350-2387
Type
jour
DOI
10.1049/ip-cdt:20050175
Filename
1626510
Link To Document