• DocumentCode
    925471
  • Title

    On-chip timing measurement architecture with femtosecond resolution

  • Author

    Collins, M. ; Al-Hashimi, B.M. ; Wilson, P.R.

  • Author_Institution
    Sch. of Electron. & Comput. Sci., Univ. of Southampton, UK
  • Volume
    42
  • Issue
    9
  • fYear
    2006
  • fDate
    4/27/2006 12:00:00 AM
  • Firstpage
    528
  • Lastpage
    530
  • Abstract
    A new timing measurement architecture based on the time-to-digital conversion technique is presented. The architecture occupies a small silicon area (200×185 μm) in a 0.12 μm CMOS process and can achieve tens of femtoseconds timing resolution, which is the highest reported to date.
  • Keywords
    CMOS integrated circuits; analogue-digital conversion; high-speed integrated circuits; timing circuits; 0.12 micron; CMOS process; femtosecond resolution; on-chip timing measurement architecture; time-to-digital conversion;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:20060583
  • Filename
    1628530
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=925471