DocumentCode :
937738
Title :
Algorithm to detect reconvergent fanouts in logic circuits
Author :
Roberts, M.W. ; Lala, P.K.
Author_Institution :
Clarkson University, Department of Electrical & Computer Engineering, Potsdam, USA
Volume :
134
Issue :
2
fYear :
1987
fDate :
3/1/1987 12:00:00 AM
Firstpage :
105
Lastpage :
111
Abstract :
Testability measures have been advocated by many authors as aids in the designing and testing of logic circuits. These have been shown to be inaccurate for circuits which contain reconvergent fanouts. An algorithm is presented which will detect all sources of reconvergence in a circuit by processing a normal textual circuit description. As well as identifying all the gates at which reconvergence occurs, the reconvergent sites, the algorithm lists all the fanout nodes that reconverge at each of these sites. The automatic detection of reconvergence can be used for improving the testability analysis of circuits containing such fanouts. This algorithm is also being used as the basis of an analysis which identifies the undetectable faults in a circuit.
Keywords :
automatic testing; logic testing; automatic reconvergent fanout detection; circuit specification; design for testability; fanout nodes; logic circuit design; testability analysis; textual circuit description; undetectable fault identification;
fLanguage :
English
Journal_Title :
Computers and Digital Techniques, IEE Proceedings E
Publisher :
iet
ISSN :
0143-7062
Type :
jour
DOI :
10.1049/ip-e.1987.0019
Filename :
4647065
Link To Document :
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