DocumentCode :
939275
Title :
A novel DFT technique for testing complete sets of ADCs and DACs in complex SiPs
Author :
Kerzérho, Vincent ; Cauvet, Philippe ; Bernard, Serge ; Azaïs, Florence ; Comte, Mariane ; Renovell, Michel
Volume :
23
Issue :
3
fYear :
2006
Firstpage :
234
Lastpage :
243
Abstract :
Testing mixed-signal circuits remains one of the most difficult challenges within the semiconductor industry. In this article, the authors present a novel DFT technique to test sets of ADCs and DACs embedded in a complex SiP. The technique provides fully digital testing on the converters to significantly reduce the cost of testing
Keywords :
analogue-digital conversion; design for testability; digital-analogue conversion; integrated circuit testing; logic testing; mixed analogue-digital integrated circuits; system-in-package; ADC; DAC; DFT technique; analogue-digital conversion; design for testability; digital testing; digital-analogue conversion; mixed-signal circuit testing; semiconductor industry; system-in-package; Analog-digital conversion; Circuit testing; Costs; Discrete Fourier transforms; Electronics industry; Equations; Logic testing; Parameter estimation; Semiconductor device measurement; Semiconductor device testing; ADC; DAC; DFT; SiP; mixed-signal testing; system-in-package;
fLanguage :
English
Journal_Title :
Design & Test of Computers, IEEE
Publisher :
ieee
ISSN :
0740-7475
Type :
jour
DOI :
10.1109/MDT.2006.59
Filename :
1634292
Link To Document :
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