Bonded wafer substrates for integrated detector arrays

Author

Wang, J.J. ; King, E.E. ; Leonov, P. ; Huang, D.H. ; Thompson, P. ; Godbey, D.

Author_Institution

Adv. Res. & Applications Corp., Sunnyvale, CA, USA

Volume

40

Issue

5

fYear

1993

fDate

10/1/1993 12:00:00 AM

Firstpage

1342

Lastpage

1346

Abstract

Bonded wafer substrates that are optimized for integrating high-energy-particle silicon detector arrays with their readout electronics have been fabricated. The detectors are processed in the handle wafer, which is a 300-μm-thick, high-resistivity, <111> silicon wafer. This wafer is bonded to a primary wafer using a low-temperature process that does not affect the detector material. The support electronics are processed in the remnant of the primary wafer, which is a submicron-thick <100> silicon film formed by a bond-and-etchback procedure. These two materials are isolated from each other by a radiation-hardened dielectric film. The integration process is based on a low-temperature, radiation-hardened VLSI CMOS process that is also shown not to seriously affect the detector material

Keywords

nuclear electronics; semiconductor counters; silicon; wafer bonding; Si; bond-and-etchback procedure; bonded wafer structures; integrated detector arrays; low-temperature process; radiation-hardened VLSI CMOS process; radiation-hardened dielectric film; readout electronics; support electronics; Detectors; Dielectric films; Dielectric materials; Readout electronics; Semiconductor films; Sensor arrays; Silicon; Substrates; Very large scale integration; Wafer bonding;

fLanguage

English

Journal_Title

Nuclear Science, IEEE Transactions on

Publisher

ieee

ISSN

0018-9499

Type

jour

DOI

10.1109/23.234548

Filename

234548