• DocumentCode
    949871
  • Title

    Charge removal from FGMOS floating gates

  • Author

    McNulty, Peter J. ; Yow, Sushan ; Scheick, Leif Z. ; Abdel-Kader, Wagih G.

  • Author_Institution
    Dept. of Phys. & Astron., Clemson Univ., SC, USA
  • Volume
    49
  • Issue
    6
  • fYear
    2002
  • fDate
    12/1/2002 12:00:00 AM
  • Firstpage
    3016
  • Lastpage
    3021
  • Abstract
    Radiation effects on floating-gate-metal-oxide-semiconductor (FGMOS) devices in the passive or quiescent mode are due to a combination of the removal of negative charge from the floating gate and the generation and trapping of positive charge in the gate oxide. The latter is subject to room temperature annealing but not the former. No difference was observed between the effects of trapped charge on transistors in "0" and "1" logic states. The amount of negative charge per unit dose that is removed from the floating gates by heavy ions is less than that removed by 6 MeV electrons, which at least partially explains the sublinear dependence on linear energy transfer.
  • Keywords
    EPROM; MOSFET; annealing; electron beam effects; interface states; ion beam effects; 6 MeV; EPROM; FGMOS transistors; UV exposure; electron irradiation; floating-gate-metal-oxide-semiconductor devices; gate oxide; heavy ion irradiation; linear energy transfer; negative charge removal; passive mode; positive charge generation; positive charge trapping; quiescent mode; radiation effects; room temperature annealing; sublinear dependence; trapped charge; Annealing; EPROM; Electron traps; Extraterrestrial measurements; Ionizing radiation; Logic; NASA; Single event upset; Switches; Temperature;
  • fLanguage
    English
  • Journal_Title
    Nuclear Science, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9499
  • Type

    jour

  • DOI
    10.1109/TNS.2002.805975
  • Filename
    1134255