• DocumentCode
    949992
  • Title

    Multiplierless approximation of transforms with adder constraint

  • Author

    Chen, Ying-Jui ; Oraintara, Soontorn ; Tran, Trac D. ; Amaratunga, Kevin ; Nguyen, Truong Q.

  • Author_Institution
    MIT, Cambridge, MA, USA
  • Volume
    9
  • Issue
    11
  • fYear
    2002
  • Firstpage
    344
  • Lastpage
    347
  • Abstract
    This letter describes an algorithm for systematically finding a multiplierless approximation of transforms by replacing floating-point multipliers with VLSI-friendly binary coefficients of the form k/2/sup n/. Assuming the cost of hardware binary shifters is negligible, the total number of binary adders employed to approximate the transform can be regarded as an index of complexity. Because the new algorithm is more systematic and faster than trial-and-error binary approximations with adder constraint, it is a much more efficient design tool. Furthermore, the algorithm is not limited to a specific transform; various approximations of the discrete cosine transform are presented as examples of its versatility.
  • Keywords
    adders; computational complexity; digital arithmetic; discrete cosine transforms; mean square error methods; transforms; BinDCT; DCT; IntDCT; MSE; VLSI-friendly binary coefficients; adder constraint; binary adders; binary shifters; complexity; discrete cosine transform; lifting structure; matrix approximation; multiplierless approximation; transforms; Algorithm design and analysis; Approximation algorithms; Costs; Discrete cosine transforms; Discrete transforms; Hardware; Sparse matrices; Very large scale integration;
  • fLanguage
    English
  • Journal_Title
    Signal Processing Letters, IEEE
  • Publisher
    ieee
  • ISSN
    1070-9908
  • Type

    jour

  • DOI
    10.1109/LSP.2002.804419
  • Filename
    1058201