Abstract :
Theoretical expressions were developed for the thermal resistance of finned, medium-power transistor heat sinks which are mounted on printed-circuit boards, with part of the cooling air free to by-pass over other components of the board. Optimizing these expressions, the fin number that will give the lowest thermal resistance for given conditions within a logic gate can be obtained. Theoretical results were in good agreement with experimental data, and indicated that, within the range of practical applications, thermal resistance of double-finned heat sinks is independent of the number of fins.
