Title :
Binary partition algorithms and VLSI architectures for median and rank order filtering
Author :
Lee, Chamg Long ; Jen, Chein-Wei
Author_Institution :
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
fDate :
9/1/1993 12:00:00 AM
Abstract :
A class of selection algorithms using binary partition that are very efficient for median and rank order filtering is considered. A unified discussion of these algorithms is presented. The algorithms have better time-area complexity than sorting methods. Counting, firing, and updating are the three basic steps. A generic structure is proposed to realize these algorithms. They can be implemented by simple and regular modules in VLSI
Keywords :
VLSI; digital filters; filtering and prediction theory; signal processing; VLSI architectures; binary partition algorithms; counting; firing; generic structure; median filtering; rank order filtering; time-area complexity; updating; Filtering algorithms; Filters; Interpolation; Partitioning algorithms; Signal processing; Signal processing algorithms; Sorting; Speech processing; Statistics; Very large scale integration;
Journal_Title :
Signal Processing, IEEE Transactions on