DocumentCode
953530
Title
Multichip Integrated Circuit Memory with Photoformed Plated Conductors
Author
Guditz, E.A. ; Burk, R.L.
Author_Institution
M.I.T. Lincoln Laboratory
Volume
11
Issue
2
fYear
1975
fDate
6/1/1975 12:00:00 AM
Firstpage
89
Lastpage
96
Abstract
A 20-chip integrated circuit memory has been constructed utilizing techniques of plastic embedment, photoformation of plastics, and selective electroless metal deposition previously reported [1]. This paper is a continuation and update of that earlier work. It has been demonstrated that groups of passivated integrated circuit chips can beaccurately placed in array positions, embedded in plastic, and interconnected with electroless nickel conductors deposited in photoformed multilayered conductor paths separated by selectively photoformed plastic dielectric layers. Thermal paths of nickel, plated directly to the backs of the chips and to an adhered photoetched metal substrate, effectively remove heat from the chips. The memory is assembled with relatively simple and inexpensive equipment, It is essentially nonrepairable and, because of limitations of photosensitive dielectrics available at the time of construction, is limited to operation in a computer-room environment. The three laboratory prototypes, constructed to demonstrate this packaging technique, were operated under dynamic cyclic-mode test conditions. No operational test data are available on the devices constructed nor can recommendations regarding use of the assembly method be made at this time.
Keywords
Integrated circuit interconnections; Integrated circuit packaging; Interconnections, Integrated circuits; Semiconductor memories; Assembly; Conductors; Dielectric substrates; Integrated circuit interconnections; Laboratories; Nickel; Packaging machines; Plastics; Prototypes; Testing;
fLanguage
English
Journal_Title
Parts, Hybrids, and Packaging, IEEE Transactions on
Publisher
ieee
ISSN
0361-1000
Type
jour
DOI
10.1109/TPHP.1975.1135044
Filename
1135044
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