• DocumentCode
    953707
  • Title

    Minimizing the computational cost and memory requirements for the capacitance calculation of 3-D multiconductor systems

  • Author

    Ouda, Mohamed ; Sebak, Abdel-Razik

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Manitoba Univ., Winnipeg, Man., Canada
  • Volume
    18
  • Issue
    3
  • fYear
    1995
  • fDate
    9/1/1995 12:00:00 AM
  • Firstpage
    685
  • Lastpage
    689
  • Abstract
    A new approach is presented which minimized the computational cost and memory requirements for capacitance calculations of three-dimensional multiconductor systems. The proposed approach, based on the integral equation method (IEM), calculated the capacitance of three-dimensional geometry of ideal conductors in two stages. In the first stage, the integral equation method was used to obtain the charge distribution on each conductor in isolation. In the second stage, the multiple interaction (coupling) among the conductors was included by applying the IEM to the whole structure and considering the charge distribution, obtained in the first stage, as a discretized entire domain basis function. The order of the interaction matrix was thus reduced to the order of conductors in the structure. The proposed method was tested for various geometries and it resulted in tremendous savings in computational time and memory storage; moreover, it gave very good accuracy in comparison with the classical integral equation method
  • Keywords
    capacitance; circuit CAD; integral equations; integrated circuit design; integrated circuit packaging; 3D multiconductor systems; CAD; EM modelling; IC design; IC packaging; capacitance calculation; charge distribution; computational cost; discretized entire domain basis function; ideal conductors; integral equation method; memory requirements; multiple interaction; three-dimensional geometry; Aging; Capacitance; Circuit testing; Computational efficiency; Computational geometry; Conductors; Design automation; Integral equations; Integrated circuit modeling; Performance analysis;
  • fLanguage
    English
  • Journal_Title
    Components, Packaging, and Manufacturing Technology, Part A, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1070-9886
  • Type

    jour

  • DOI
    10.1109/95.465170
  • Filename
    465170