• DocumentCode
    956138
  • Title

    Another design of the successive approximation register for A/D converters

  • Author

    Yuen, C.K.

  • Author_Institution
    University of Tasmania, Hobart, Australia
  • Volume
    67
  • Issue
    5
  • fYear
    1979
  • fDate
    5/1/1979 12:00:00 AM
  • Firstpage
    873
  • Lastpage
    874
  • Abstract
    An alternative design of the successive approximation register is proposed. The design eliminates the dual flip-flop outputs of previous designs.
  • Keywords
    Attenuation; Clocks; Delay; Digital filters; Filtering; Flip-flops; Frequency; Information science; Logic design; Logic devices;
  • fLanguage
    English
  • Journal_Title
    Proceedings of the IEEE
  • Publisher
    ieee
  • ISSN
    0018-9219
  • Type

    jour

  • DOI
    10.1109/PROC.1979.11341
  • Filename
    1455610
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=956138