DocumentCode
956267
Title
Practical realisation of mod p, p prime multiplier
Author
Ramnarayan, A.S.
Author_Institution
University of Cincinnati, Department of Electrical & Computer Engineering, Cincinnati, USA
Volume
16
Issue
12
fYear
1980
Firstpage
466
Lastpage
467
Abstract
A practical realisation of a mod p, p prime multiplier for the case p = 2n¿2k+1, k<n is described. Simulated results are presented and speed metrics based on state-of-the-art memory technology are computed.
Keywords
digital arithmetic; multiplying circuits; memory technology; mod p, p prime multiplier; speed metrics;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19800328
Filename
4244097
Link To Document