Design of On-Chip Transformer With Various Coil Widths to Achieve Minimal Metal Resistance

Author

Hsu, Heng-Ming ; Tseng, Chien-Wen

Author_Institution

Nat. Chung Hsing Univ., Taichung

Volume

28

Issue

11

fYear

2007

Firstpage

1029

Lastpage

1032

Abstract

A layout design algorithm of a variable-width transformer is proposed to minimize metal resistance in this letter. The proposed algorithm can rapidly design metal widths in each coil of a planar transformer for a given chip area. Two on-chip transformers with identical self-inductance are fabricated to verify the proposed algorithm in 90-nm CMOS technology. Measurement results demonstrate the improvement of metal resistance approximates to the value of 11.6%. Results of this study provide an effective algorithm to design a minimal-loss transformer for radio frequency integrated circuit applications.

Keywords

CMOS integrated circuits; coils; radiofrequency integrated circuits; transformers; CMOS technology; coil widths; layout design algorithm; metal resistance; on-chip transformer; planar transformer; radio frequency integrated circuit; size 90 nm; variable-width transformer; Algorithm design and analysis; CMOS technology; Coils; Electrical resistance measurement; Impedance; Inductors; Integrated circuit measurements; Integrated circuit technology; Radiofrequency integrated circuits; Semiconductor device measurement; Analytical algorithm; minimum resistance; on-chip transformer; variable metal width;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/LED.2007.906934

Filename

4367550