DocumentCode :
959852
Title :
Influence of majority carrier accumulation in the SIT with a high-purity channel on voltage amplification factor
Author :
Yano, Koji ; Kim, Chang-Woo ; Kimura, Masakazu ; Tanaka, Akira ; Motoyama, Shin-Ichi ; Sukegawa, Tokuzo
Author_Institution :
Shizuoka Univ., Hamamatsu, Japan
Volume :
40
Issue :
11
fYear :
1993
fDate :
11/1/1993 12:00:00 AM
Firstpage :
2092
Lastpage :
2094
Abstract :
The influence of accumulation regions of majority carriers in the SIT with high-purity channel on the voltage amplification factor is discussed. The results of a two-dimensional simulation have revealed that a large accumulation region in the high-purity channel, which is related to the Debye length in thickness, restricts extension of the depletion region from the gate, resulting in significant degradation of the voltage amplification factor
Keywords :
accumulation layers; carrier density; field effect transistors; semiconductor device models; Debye length; SIT; depletion region; drain current drain voltage characteristics; electron concentration spatial distribution; high-purity channel; majority carrier accumulation; source to drain potential distribution; two-dimensional simulation; voltage amplification factor; Charge carrier processes; Current density; Degradation; Differential equations; Doping; FETs; Impurities; Poisson equations; Scattering; Voltage control;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/16.239755
Filename :
239755
Link To Document :
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