Temperature and scaling behavior of strained-Si N-MOSFET´s

Author

Welser, J. ; Hoyt, Judy L. ; Gibbons, J.F.

Author_Institution

Solid State Electron. Lab., Stanford, CA

Volume

40

Issue

11

fYear

1993

fDate

11/1/1993 12:00:00 AM

Firstpage

2101

Abstract

Summary form only given. The device characteristics of N-MOSFETs fabricated in strained-Si have been investigated as a function of temperature and gate length. It is found that the low field mobility is enhanced compared to Si control devices at temperatures down at 20 K. For moderate fields, g_m is enhanced at all measured temperatures, for effective gate lengths down to 0.8 μm (L _drawn=1.5 μm). At high power density, however, the devices exhibit a negative differential output resistance. The thermal conductivity of the relaxed Si_1-xGe_x buffer layers is estimated by fitting polysilicon resistor characteristics to a first order model

Keywords

carrier mobility; insulated gate field effect transistors; negative resistance; semiconductor device testing; 0.8 micron; NMOSFET; device characteristics; first order model; gate length; high power density; low field mobility; negative differential output resistance; polysilicon resistor characteristics; relaxed Si_1-xGe_x buffer layers; scaling behavior; strained Si; thermal conductivity; transconductance enhancement; Bipolar transistors; Electric breakdown; Feedback; Impact ionization; MOSFET circuits; Temperature;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/16.239765

Filename

239765