DocumentCode :
960213
Title :
A Configurable Pixel Cache for Fast Image Generation
Author :
Goris, Andy ; Fredrickson, Bob ; Baeverstad, Harold L., Jr.
Author_Institution :
Hewlett-Packard Co.
Volume :
7
Issue :
3
fYear :
1987
fDate :
3/1/1987 12:00:00 AM
Firstpage :
24
Lastpage :
32
Abstract :
This article describes an approach to fast image generation that uses a high-speed serial scan converter, a somewhat slower frame buffer, and a pixel cache to match the bandwidth between the two. Cache hit rates are improved by configuring the cache to buffer either 4 × 4 or 16 × 1 tiles of frame memory, depending on the type of operation being performed. For line drawing, the implenmention discribed can process 300,000 30-pixel vectors per second. For shaded polygons, the system can fill 16,000 900-pixel polygons per second. In addition to buffering pixel intensity data, the pixel cache also buffer z (depth) values, improving the performance of the z-buffer hidden-surface algorithm. By utilizing z-value caching, the system can process 5800 900-pixel shaded polygons per second with hidden-surface removed.
Keywords :
Buffer storage; Image generation; Random access memory; Read-write memory; Simultaneous localization and mapping; Two dimensional displays;
fLanguage :
English
Journal_Title :
Computer Graphics and Applications, IEEE
Publisher :
ieee
ISSN :
0272-1716
Type :
jour
DOI :
10.1109/MCG.1987.276962
Filename :
4057128
Link To Document :
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