DocumentCode
960593
Title
Parallel Processing in Boolean Algebra
Author
Svoboda, Antonin
Author_Institution
Department of Computer Science, University of California, Los Angeles, Calif.
Issue
9
fYear
1973
Firstpage
848
Lastpage
851
Abstract
A processor called Boolean analyzer has been presented at the 1968 IFIP Congress to introduce parallel processing of Boolean expressions [1]. The present paper shows how to increase its speed many times by making its processing more parallel. The applications of the Boolean analyzer are limited to few but important problems. A typical problem of that kind: listing of all implicants of a function of 7 variables defined by not more than 100 term implicants (of the complement of that function) takes only about 40 ¿s (supposing a delay line storage working at the clock impulse rate of 2.106/s).
Keywords
Boolean algebra; Clocks; Computer science; Counting circuits; Delay lines; Hardware; Hazards; Parallel processing; Batch processing; Boolean analyzer; listing of implicants; parallel processing in Boolean algebra; triadic order;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/TC.1973.5009177
Filename
5009177
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