• DocumentCode
    960596
  • Title

    On Possible Thermal Degradation in Spirally Programmed Interconnection Wafer Technology

  • Author

    Begg, Iain M.

  • Author_Institution
    University of St.Andrews,Scotland, U.K
  • Volume
    4
  • Issue
    1
  • fYear
    1981
  • fDate
    3/1/1981 12:00:00 AM
  • Firstpage
    154
  • Lastpage
    157
  • Abstract
    A possible cause of difficulty in utilizing spiral programmed interconnection in full wafer technology is examined. This is the existence of hot spots. It is shown that hot spots are likely to occur and, in which case, to impair seriously the wafer performance. Means of avoiding such degradation are indicated.
  • Keywords
    Integrated circuit metallization; Integrated circuit thermal factors; Costs; Integrated circuit interconnections; Manufacturing; Packaging; Spirals; Temperature; Thermal degradation; Thermal resistance; Very large scale integration; Wafer scale integration;
  • fLanguage
    English
  • Journal_Title
    Components, Hybrids, and Manufacturing Technology, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0148-6411
  • Type

    jour

  • DOI
    10.1109/TCHMT.1981.1135775
  • Filename
    1135775
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=960596