Title :
Scheduling Multipipeline and Multiprocessor Computers
Author_Institution :
Department of Computer Science, University of Minnesota, Minneapolis, MN 55455.
fDate :
7/1/1984 12:00:00 AM
Abstract :
We develop good heuristics to schedule tasks on computers that have multiple pipelines or multiple asynchronous processors. We also consider the case when different pipes or processors run at different speeds.
Keywords :
Computer aided instruction; Computer science; Decoding; Delay; Microelectronics; Performance evaluation; Pipelines; Processor scheduling; Time measurement; Velocity measurement; Asynchronous processors; heuristics; multiple pipelines; multiprocessors; scheduling;
Journal_Title :
Computers, IEEE Transactions on
DOI :
10.1109/TC.1984.5009337
