• DocumentCode
    965488
  • Title

    Characterization of polysilicon-encapsulated local oxidation

  • Author

    Roth, Scott S. ; Ray, Wayne J. ; Mazure, Carlos ; Cooper, Kent ; Kirsch, Howard C. ; Gunderson, Craig D. ; Ko, Judy

  • Author_Institution
    Motorola Inc., Austin, TX, USA
  • Volume
    39
  • Issue
    5
  • fYear
    1992
  • fDate
    5/1/1992 12:00:00 AM
  • Firstpage
    1085
  • Lastpage
    1089
  • Abstract
    Device isolation has been most commonly achieved through the use of local oxidation of silicon (LOCOS) or LOCOS derivatives. LOCOS is a highly dependable, low-defect isolation technique, which explains its continued extensive use. Unfortunately, the inherently large oxide encroachment associated with LOCOS is not compatible with 0.8-μm design rules. Many alternative isolation techniques designed to reduce oxide encroachment have been proposed. These alternatives often result in an increase in defectivity and/or process complexity. Polysilicon-encapsulated local oxidation (PELOX) utilizes a polysilicon-filled cavity self-aligned to the nitride edge to achieve oxide encroachment reduction. The physical (scanning electron and transmission electron micrographs) and electrical (electrical channel width, diode leakage, and gate oxide integrity) characterization of PELOX isolation are reported
  • Keywords
    integrated circuit technology; oxidation; scanning electron microscope examination of materials; silicon; transmission electron microscope examination of materials; 0.8 micron; LOCOS; PELOX isolation; alternative isolation techniques; defectivity; device isolation; diode leakage; electrical channel width; electrical characterisation; encroachment reduction; gate oxide integrity; low-defect isolation technique; nitride edge; oxide encroachment; physical characterisation; polycrystalline Si; polysilicon encapsulation local oxidation; polysilicon-filled cavity; process complexity; scanning electron micrography; submicron design rules; transmission electron micrographs; Buffer layers; Dry etching; Electrons; Hafnium; Laboratories; Oxidation; Research and development; Semiconductor diodes; Silicon; Surface topography;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/16.129087
  • Filename
    129087