• DocumentCode
    968504
  • Title

    A hybrid energy-estimation technique for extensible processors

  • Author

    Fei, Yunsi ; Ravi, Srivaths ; Raghunathan, Anand ; Jha, Niraj K.

  • Author_Institution
    Dept. of Electr. Eng., Princeton Univ., NJ, USA
  • Volume
    23
  • Issue
    5
  • fYear
    2004
  • fDate
    5/1/2004 12:00:00 AM
  • Firstpage
    652
  • Lastpage
    664
  • Abstract
    In this paper, we present an efficient and accurate methodology for estimating the energy consumption of application programs running on extensible processors. Extensible processors, which are getting increasingly popular in embedded system design, allow a designer to customize a base processor core through instruction set extensions. Existing processor energy macromodeling techniques are not applicable to extensible processors, since they assume that the instruction set architecture as well as the underlying structural description of the micro-architecture remain fixed. Our solution to the above problem is a hybrid energy macromodel suitably parameterized to estimate the energy consumption of an application running on the corresponding application-specific extended processor instance, which incorporates any custom instruction extension. Such a characterization is facilitated by careful selection of macromodel parameters/variables that can capture both the functional and structural aspects of the execution of a program on an extensible processor. Another feature of the proposed energy characterization flow is the use of regression analysis to build the macromodel. Regression analysis allows for in-situ characterization, thus allowing arbitrary test programs to be used during macromodel construction. We validated the proposed methodology by characterizing the energy consumption of a state-of-the-art extensible processor (Tensilica´s Xtensa). We used the macromodel to analyze the energy consumption of several benchmark applications with custom instructions. The mean absolute error in the macromodel estimates is only 3.3%, when compared to the energy values obtained by a commercial tool operating on the synthesized register-transfer level (RTL) description of the custom processor. Our approach achieves an average speedup of three orders of magnitude over the commercial RTL energy estimator. Our experiments show that the proposed methodology also achieves good relative accuracy, which is essential in energy optimization studies. Hence, our technique is both efficient and accurate.
  • Keywords
    application specific integrated circuits; integrated circuit modelling; low-power electronics; microprocessor chips; statistical analysis; application-specific instruction set processor; base processor core customization; embedded system; energy characterization flow; energy estimation; extensible processors; instruction set extensions; register-transfer level description; regression analysis; Application software; Application specific processors; Benchmark testing; Embedded system; Energy consumption; Hardware; Optimization methods; Parameter estimation; Process design; Regression analysis;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/TCAD.2004.826546
  • Filename
    1291578