A low-power CMOS time-to-digital converter

Author

Räisänen-Ruotsalainen, Elvi ; Rahkonen, Tho ; Kostamovaara, Juha

Author_Institution

Dept. of Electr. Eng., Oulu Univ., Finland

Volume

30

Issue

9

fYear

1995

fDate

9/1/1995 12:00:00 AM

Firstpage

984

Lastpage

990

Abstract

A time-to-digital converter, TDC, with 780 ps lsb and 10-μs input range has been integrated in a 1.2-μm CMOS technology. The circuit is based on the interpolation time interval measurement principle and contains an amplitude regulated crystal oscillator, a counter, two pulse-shrinking delay lines, and a delay-locked loop for stabilization of the delay. The TDC is designed for a portable, low-power laser range-finding device. The supply voltage is 5±0.5 V, and the operating temperature range is -40 to +60°C. Single-shot accuracy is 3 ns and accuracy after averaging is ±120 ps with input time intervals 5-500 ns. In the total input range of 10 μs, the final accuracy after averaging is ±200 ps. Current consumption is 3 mA, and the chip size is 2.9 mm×2.5 mm

Keywords

CMOS integrated circuits; analogue-digital conversion; circuit stability; delay circuits; interpolation; laser ranging; time measurement; -40 to 60 C; 1.2 micron; 10 mus; 3 mA; 5 V; 5 to 500 ns; ADC; CMOS time-to-digital converter; amplitude regulated crystal oscillator; counter; delay stabilization; delay-locked loop; interpolation time interval measurement; low-power converter; portable laser range-finding device; pulse-shrinking delay lines; CMOS technology; Counting circuits; Delay effects; Delay lines; Integrated circuit measurements; Integrated circuit technology; Interpolation; Oscillators; Pulse measurements; Time measurement;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.406397

Filename

406397