DocumentCode
968681
Title
Schottky-barrier coupled Schottky-barrier gate GaAs FET logic
Author
Hashizume, N. ; Yamada, H. ; Tomizawa, K.
Author_Institution
Electrotechnical Laboratory, Tsukuba, Japan
Volume
17
Issue
1
fYear
1981
Firstpage
51
Lastpage
52
Abstract
First accounts of the experimental details of Schottky-barrier gate GaAs FET logic circuits that use a Schottky barrier for interstage level shifting are described. Tpd and power consumption of an inverter in an 11-stage ring oscillator showed 120 ps and 12 mW, respectively, with FET gate dimensions of 3×50 ¿m2.
Keywords
III-V semiconductors; Schottky gate field effect transistors; gallium arsenide; integrated logic circuits; GaAs FET logic circuits; III-V semiconductors; Schottky barrier gate; interstage level shifting; invertor; ring oscillator;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19810037
Filename
4245497
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