• DocumentCode
    972746
  • Title

    An RNS Implementation of an F_{p} Elliptic Curve Point Multiplier

  • Author

    Schinianakis, Dimitrios M. ; Fournaris, Apostolos P. ; Michail, Harris E. ; Kakarountas, Athanasios P. ; Stouraitis, Thanos

  • Author_Institution
    Electr. & Comput. Eng. Dept., Univ. of Patras, Patras
  • Volume
    56
  • Issue
    6
  • fYear
    2009
  • fDate
    6/1/2009 12:00:00 AM
  • Firstpage
    1202
  • Lastpage
    1213
  • Abstract
    Elliptic curve point multiplication is considered to be the most significant operation in all elliptic curve cryptography systems, as it forms the basis of the elliptic curve discrete logarithm problem. Designs for elliptic curve cryptography point multiplication are area demanding and time consuming. Thus, the efficient realization of point multiplication is of fundamental importance for the performance of an elliptic curve system. In this paper, a hardware architecture of an elliptic curve point multiplier is proposed that exploits the intrinsic parallelism of the residue number system (RNS), in order to speed up the elliptic curve point calculations and minimize the area complexity of the elliptic curve point multiplier. The architecture proves to be the fastest among all known design approaches, while complexity is less than half of that of previous efforts. This architecture also supports the required input (binary-to-RNS) and output (RNS-to-binary) conversions. Through a graph-oriented approach, the area of the elliptic curve point multiplier is minimized, by optimizing the point addition and doubling algorithms. Also, through this approach, the number of execution steps for point addition is matched to the number of execution steps for point doubling. Additionally, the impact of various RNS bases, in terms of number of moduli and their bit lengths, on the area and speed of the proposed implementation is analyzed, in an effort to define the potential for using RNS in elliptic curve cryptography.
  • Keywords
    multiplying circuits; parallel architectures; public key cryptography; residue number systems; Fp elliptic curve point multiplier; RNS implementation; RNS-to-binary conversion; binary-to-RNS conversion; elliptic curve cryptography; graph-oriented approach; hardware architecture; input conversion; intrinsic parallelism; output conversion; point addition algorithms; point doubling algorithms; prime fields; residue number system; Computer arithmetic; elliptic curve cryptography (ECC); finite field arithmetic; residue number system (RNS);
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems I: Regular Papers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1549-8328
  • Type

    jour

  • DOI
    10.1109/TCSI.2008.2008507
  • Filename
    4663678