• DocumentCode
    973693
  • Title

    A four-variable programmable universal logic module using digital summation threshold logic gates

  • Author

    Pal, Ajit

  • Author_Institution
    Indian Institute of Technology, Kharagpur, India
  • Volume
    72
  • Issue
    12
  • fYear
    1984
  • Firstpage
    1813
  • Lastpage
    1815
  • Abstract
    Combining the concepts of programmable logic arrays (PLAs) and conventional universal logic modules (ULMs) a new type of programmable ULM for four variables has been proposed. The realization is based on the digital summation threshold logic (DSTL) gates, a cellular array for realizing threshold logic functions.
  • Keywords
    Analog integrated circuits; Boolean functions; Computer science; Electrons; Fabrication; Isobaric; Logic arrays; Logic functions; Logic gates; Programmable logic arrays;
  • fLanguage
    English
  • Journal_Title
    Proceedings of the IEEE
  • Publisher
    ieee
  • ISSN
    0018-9219
  • Type

    jour

  • DOI
    10.1109/PROC.1984.13090
  • Filename
    1457358
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=973693