DocumentCode
974070
Title
Implementing a bubble memory hierarchy system
Author
Segura, R. ; Nichols, C.D.
Author_Institution
NASA-Langley Research Center, Hampton, VA
Volume
15
Issue
6
fYear
1979
fDate
11/1/1979 12:00:00 AM
Firstpage
1898
Lastpage
1900
Abstract
This paper reports on implementation of a magnetic bubble memory in a two-level hierarchial system. The hierarchy used a major-minor loop device and RAM under microprocessor control. Dynamic memory addressing, dual bus primary memory, and hardware data modification detection are incorporated in the system to minimize access time. It is the objective of the system to incorporate the advantages of bipolar memory with that of bubble domain memory to provide a smart, optimal memory system which is easy to interface and independent of user´s system.
Keywords
Magnetic bubble memories; Memory hierarchies; Random-access memories; Bridges; Control systems; Hardware; Magnetic devices; Magnetic domains; Microprocessors; Random access memory; Read-write memory; System performance; User interfaces;
fLanguage
English
Journal_Title
Magnetics, IEEE Transactions on
Publisher
ieee
ISSN
0018-9464
Type
jour
DOI
10.1109/TMAG.1979.1060531
Filename
1060531
Link To Document