Title :
Erratum: Speed-power property of GaAs Schottky-barrier coupled Schottky-barrier gate FET logic
Author :
Tomizawa, Keiichi ; Hashizume, Nobuya ; Matsumoto, Kaname
Keywords :
III-V semiconductors; Schottky effect; Schottky gate field effect transistors; field effect integrated circuits; gallium arsenide; integrated logic circuits; GaAs Schottky-barrier coupled Schottky-barrier gate FET logic inverter; computer simulation; small pulse voltage magnitude; speed-power property;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19810653
