Low-probability punchthrough in Josephson junctions

Punchthrough in latching Josephson junctions is the apparently random failure to reset to the zero-voltage state when the drive current passes through zero as it changes polarity. This phenomenon has previously been analyzed for probabilities approaching unity. This paper extends the analysis and compares derived expressions with numerical simulations for probabilities as low as 10^-7. A linearized analysis indicates that the presence of noise currents has only a minor effect on punchthrough. This is confirmed by simulation. Design curves are presented, relating device capacitance, resistance, critical current, and clock transition time to punchthrough probability. Preliminary results for interferometers are shown.