DocumentCode
979063
Title
Area-efficient high-speed carry chain
Author
Amin, A.A.
Author_Institution
Dept. of Comput. Eng., King Fahd Univ. of Pet. & Miner., Dhahran
Volume
43
Issue
23
fYear
2007
Abstract
An improved carry chain circuit with carry-skip capability is described. The carry-skip logic allows an arbitrarily long carry chain without the need for intermediate buffers for signal restoration, leading to an implementation that is both fast and area-efficient. The chain can flexibly accommodate technology-imposed maximum depth of NMOS transistor pull-down stack.
Keywords
adders; carry logic; NMOS transistor pull-down stack; arbitrarily long carry chain; area-efficient high-speed carry chain; carry-skip capability; carry-skip logic; improved carry chain circuit; signal restoration; technology-imposed maximum depth;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:20071613
Filename
4384259
Link To Document