Si, SiGe Nanowire Devices by Top–Down Technology and Their Applications

Author

Singh, Navab ; Buddharaju, Kavitha D. ; Manhas, S.K. ; Agarwal, A. ; Rustagi, Subhash C. ; Lo, G.Q. ; Balasubramanian, N. ; Kwong, Dim-Lee

Author_Institution

Inst. of Microelectron., Singapore

Volume

55

Issue

11

fYear

2008

Firstpage

3107

Lastpage

3118

Abstract

Nanowire (NW) devices, particularly the gate-all-around (GAA) CMOS architecture, have emerged as the front-runner for pushing CMOS scaling beyond the roadmap. These devices offer unique advantages over their planar counterparts which make them feasible as an option for 22 -nm and beyond technology nodes. This paper reviews the current technology status for realizing the GAA NW device structures and their applications in logic circuit and nonvolatile memories. We also take a glimpse into applications of NWs in the ldquomore-than-Moorerdquo regime and briefly discuss the application of NWs as biochemical sensors. Finally, we summarize the status and outline the challenges and opportunities of the NW technology.

Keywords

CMOS integrated circuits; Ge-Si alloys; MOSFET; biological techniques; chemical sensors; elemental semiconductors; logic circuits; nanowires; random-access storage; semiconductor materials; semiconductor quantum wires; silicon; Si; SiGe; biochemical sensor application; gate-all-around CMOS architecture; logic circuit applications; nanowire devices; nonvolatile memory applications; top-down technology; CMOS technology; Degradation; Doping; Germanium silicon alloys; High K dielectric materials; High-K gate dielectrics; MOSFETs; Nanoscale devices; Nonvolatile memory; Silicon germanium; Gate-all-around (GAA) nanowire (NW) transistors; NW CMOS; NW logic; Nonvolatile memory (NVM); top–down technology;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/TED.2008.2005154

Filename

4668588